Dasharathy N. Ramesh
42 Olmsted Road, Apt 106C, Stanford CA – 94305;
Education
State University of New York, Binghamton Dec 2013
MS, Industrial and Systems Engineering (GPA: 3.64 / 4.0)
A thesis consisting of the research topics: “Fabrication of CZTS Solar Cells by Sputtering”, “An experimental technique to measure the Resistance change of ITO Thin Film during Cyclic Loading”, “Reliability study of Wafer Level Chip Scale Package using Board Level Drop Test”.
National Institute of Technology Karnataka – Surathkal, India May 2011
BS, Chemical Engineering
Experience
Analog Devices Inc., Wilmington, MA (Binghamton University Research Assistant) Sep 2012-Aug 2013
IC Package process development and assembly operations; experience with development of MEMS microphone
Knowledge of PCB manufacturing processes, gold and copper wire bonding, flip chip technology
Characterization / failure analysis and reliability studies on semiconductor / IC packages like SOIC, WLCSP
Developed SolidWorks models for new package designs; performed thermal modeling using FloTHERM
Executed design drawings for various engineering groups and documented reports for quarterly review presentations
Center for Advanced Microelectronics Manufacturing, Binghamton University (Research Assistant) Aug 2011- Aug2012
Designed high efficiency (6%) Cu2ZnSnS4 (CZTS) thin film Solar Cells
Performed reliability studies of thin film ITO coatings on flex (with applications in LCDs & flexible Solar Cells)
Indian Institute of Science (IISc), Bangalore, India Summers 2009-2010
Research exposure in complex fluids, granular flow and particle suspensions (Internship 2010)
Certifications/Professional Memberships
Lean Six Sigma Green Belt, Dartmouth College Jan 2012
Best poster-paper award - Paper titled “Thin film CZTS Solar cell using sputtering method” – iMAPS New England Conferen...
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