EDUCATION
Syracuse University
Syracuse, New York
L.C.Smith College of Engineering and Computer Science
M.S, Computer Engineering (Hardware Track)
CGPA 3.56/4
Graduated May 2012
M.S.Ramiah Institute of Technology
Bangalore, India
Bachelor of Engineering in Electronics and Telecommunication Engineering
CGPA 3.85/4
Graduated June 2008
WORK EXPERIENCE:
System Engineer at University Hill Associates: July 2012 – May 2013 (11 months)
• Enhanced front/back end network design software and test flows, test methodology and hardware performance.
• Reduced and optimize through-put of systems and cost by developing various scripts and C/C++ modules.
• Design and installations of UNIX based flows and algorithm for system-level implementation.
• Used Agile Development Cycles to reduce Design for Test Complexity for Software Testing features.
• Work closely with various experienced professional for successful completion of Projects.
Labview Automation Intern at Inficon LLC, East Syracuse, NY, USA: June 2011 –May 2012 (11 months)
• Developed various software test tool for 5 board test fixtures which comprise product Transpector Compact Process Monitor (CPM).
• This development started with a system study of the circuit boards followed by code designing and User Interface on Labview. This Test Software included Device Communications, automated test sequencing and execution.
• The software was upgraded to provide at test storage capability in accordance with the Aegis© Format. In the third quarter of the internship, code design optimization of the circuit was followed by software testing and generating the executable file. Interacted with testing team to determine the requirements of the process.
• This software was sent to the Production Unit where the boards were manufactured and then tested with this software. Developed numerous Labview VI’s and included them in the company’s Library for future implementation. Documented every VI and prepared guidelines to use this software, the final step of this project.
Research Intern at DRDO Metcalf House, New Delhi, India: July 2008- July 2009 (12 months)
• Developed VHDL testbenches and application for the project Swarm Optimization. Involved in Research Project in Artificial Intelligence and started the PSO group in DTRL (Defense Terrain Research laboratory).
• Performed JTAG/SCAN programming using various ISP defined libraries.
TECHNICAL SKILLS
Programming Tools: Visual Bacis C++, VHDL, Verilog, System Verilog Xilinx ISE, Simulink, Lab View ver8.6, 2011, ModelSim, Microprocessor x86, Motorola Simulator DSP56300, HSPICE, Perl, ChipScope
Operating Systems and Hardware: MS DOS, MS Windows, UNIX, UART , RS232, GPIB IEEE, PCI Express, Logic Analyzers, Oscilloscopes, Signal Generator, Spectrum Analyzer, Probes
VLSI Design Tools: Cadence tools (Virtuoso Layout & Schematic editors, Spectre & NC Verilog simulators), Synopsys Design Compiler, DFT, Model Sim HDL simulator, Spice, Simulink, Xilinx, System Studio, Tetra-MaxATPG
Relevant Projects on Verilog and VHDL
Course: Digital System Design OS: Windows 7 Tool: ModelSim
Project #1 – Dual Clock FIFO for communicating between two domains operating at different clock frequencies
- Developed various blocks like Sync Logic, SRAM, Binary to Gray converter, Write and Read Logic for the FIFO.
- Developed Test bench in Verilog to verify the individual modules.
- Developed Test Bench to rigorously test the FIFO by randomly varying Producer Clock and Consumer Clock.
Project #2 –Pattern Detector both overlapping and Non-Overlapping
- Developed state charts followed by optimization to reduce the number of states. Developed both Moore and Melay Models
for implementation in Verilog.
- Developed Test bench to verify the Pattern Detectors both overlapping and non-overlapping.
- Synthesized the Melay and Moore Implementations, generated area and power reports for comparison between the two models.
Project #3 – 8-bit General Purpose Microprocessor
- Developed carious modules like Logic Unit, ALU that comprised of a full adder,Xor unit and Inverter.
- Developed Test bench to verify the individual Module and the entire integrated Microprocessor.
- Simulation and waveforms for different opcodes like Jump, Add and Mov Instructions.
Relevant Projects on VLSI Circuits Designing
Logic, RTL, Physical Design of 8-bit Microprocessor with AMI0.5um to Tapout
- Designing of RT...
Login or Register to view the full resume.
