"SSD Engineer"
WORK EXPERIENCE
Senior Firmware Engineer
Enterprise Solid State Drive Manufacturing Test
April 2013 – December 2014, HGST, Santa Ana, California
Performed BIST (drive self test for manufacturing) firmware code validation
Modified BIST firmware to inject errors for nand program, erase, and read commands
Modified PCIe SSD drive to inject errors for Nand, capacitor, and DDR DRAM tests
Worked on virtual UART code to provide communication channels for SSD manufacturing tests
Supported other Manufacturing Test development as needed
Senior Test Development Engineer
January 2008 – March 2013, STEC, Santa Ana, California
Modified firmware for enterprise Solid State Drives to provide test hooks for media error injection in DVT
Developed “Chip Kill”, a firmware hook for flash error injection test to exercise the RAID function in the firmware. In one case it was used to catch a data miscompare due to a cache coherency bug and validate the fix
Traced the firmware code to root cause an ESI/SES bug
Modified firmware code to update a vendor unique SCSI inquiry page for DVT purposes
Developed flash “CellCare” tests (Python scripts), a proprietary technology that increases the endurance cycles of the flash media. This is done by modifying the flash “Test Mode registers” to improve the erase, program, and read cycles
Troubleshot firmware issues using SAS/FC/SATA bus analyzers, logic analyzers, and oscilloscopes
Developed error injection tests for SSD NAND flash memory media
Performed flash media signal integrity check
Modified C/C++ SSD test software
Performed SLC/MLC flash qualifications
Root caused a data miscompare due to flash media issue using logic analyzer
Hardware Verification Engineer
August 2005 – August 2007, Southland Micro Systems, Irvine, California
Performed Signal Integrity tests for DRAM memory modules (SDRAM, DDR, & DDR2)
Validated prototype design in server and desktop computer systems and other custom systems such as Network Intrusion Detection Systems
Verified PCB layout using Cadence Allegro and simulate PCB using Mentor Hyperlynx
Associate Engineer
October 2001 – June 2002, Dura Micro, Inc, Chino, California
Checked OrCAD schematic designs of USB 2.0 flash memory card readers based on reference schematics for Compact Flash, SD, Memory Stick, etc.
Coordinated with test, layout, component purchasing, and manufacturing processes.
Organized engineering documents such as schematics, layouts, and bill of materials.
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