Education
University of Southern California (USC), Los Angeles, CA, USA
M.S. in Chemical Engineering
Yuan Ze University (YZU), Taoyuan City, Taiwan
M.S. in Materials Science
Feng Chia University (FCU), Taichung City, Taiwan
B.S. in Chemical Engineering
Relevant coursework: Solid State Processing, Semiconductor Device Physics, DOE, Diffusion, CVD, PVD, Mass Transfer, Viscous Flow, Heat Transfer, Polymer Chemistry, Transmission Electron Microscope, OLED, and Simulation of Materials
Work Experience
Wei Wu Research Group, University of Southern California (USC), CA, USA May 2015 - Present Research Associate
• Prepared Au microparticles using photolithography on wafer in a clean room for microwave cancer therapy
• Applied and optimized CVD process to deposit parylene coating as barrier and supporter on silicon wafer
• Optimized Ti/Au metallization and lift-off processing on silicon wafer by E-beam evaporator and acetone bath • Experienced with inductively coupled plasma (ICP) RIE to etch parylene film on silicon wafer with Oxygen gas
Health One Pharmaceuticals, Inc., City of Industry, CA, USA May - August 2014 Quality and Process Control Engineer
• Performed microbiology testing for raw materials and products
• Characterized raw materials and products by FTIR, UV-VIS. and HPLC
• Drafted the FDA-regulated Standard Operating Procedure for the assembly line to satisfy the cGMP regulations
Ministry of National Defense R.O.C., Taiwan August 2011 - July 2012 Manager of Chemical Equipment Department
• Led and assigned a five-crew team to perform chemical equipment maintenance and troubleshooting job
Molecular Materials Lab., YZU, Taoyuan City, Taiwan July 2009 - July 2011 Research Assistant
• Prepared and characterized I-III-VI2 compounds decorated on the soluble graphene nanosheet and their mixtures with conjugated polymer Poly(3-hexylthiophene-2,5-diyl) (P3HT) served as the active layer for hybrid solar cells
• Prepared Poly(9,9-dioctylfluorene) (PFO) with different molecular weight to modify CdTe nanoparticles for improving its dispersion in organic solvent
Research Experience
Solid State Processing and Integrated Circuits Lab., USC, Los Angeles, USA September 2014 - January 2015
• Fabricated chips in a clean room from the bare wafer to multi-step metallization leading to the final cap layer
• Controlled process of photoresist processing including spin-coating, photolithography, etching and thermal treatment
• Identified IC defects and characteri...
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